Call for Papers

The chair of Embedded Systems of the information Technology (ESIT) does research in the area of new hardware / software systems. The development and the application of new methods for hardware and software realization, as well as the programming, requires the rising complexity of future embedded systems in the information technology. Typical areas of application in the information technology come from the areas of the image processing, measuring technology, mobile communication, control engineering and control technology, Security and many more. In these domains, the demands increase more and more for a huge data throughput with maximum energy efficiency (arithmetic operations / watt). In particular the reduction of power dissipation and improvement of the computational efficiency is one of the most important aspects for mobile systems. This can be reached only by the consequent application of new multicore technologies as well as the use of reconfigurable hardware as for example Field Programmable gate Arrays (FPGA). Here in particular one of the main focuses lies for the institute and additionally the development of own FPGA architectures and their physical realization as well as the practical use.

Currently 3 seats for scientific employees (F/M) with the aim of the doctorate are available. The main focuses of the research subjects are in the areas:

• New development methods, developing tools as well as the hardware of application specific processors and reconfigurable hardware (Field Programmable gate Array / Functional Array) from high level of abstraction level (e.g., architecture description languages)

• Virtualization of heterogeneous hardware in embedded systems: Hardware / software Co-design of the virtualization layer, design of run-time systems / extension of Embedded-Linux based operating systems for a dynamic management of the hardware resources

• System development of heterogeneous and adaptive Multicore hardware with virtual platforms (e.g., Open Virtual Platform, Simics) taking into account modern hardware / software Co-design principles

A pleasant work atmosphere can be found in the institute as well as various possibilities of development expect you during the doctorate. The applicant should have the degree Dipl.-Ing./master from the electrical engineering and information technology.  Experiences in at least one of the research focuses should be available. Experiences with hardware (FPGA, processors), the hardware description language VHDL, C, C ++ as well as Matlab / Simulink are desirable. The institute maintains international collaborations, so that good English linguistic knowledge is necessary. With international publications and presentations, the available network between research groups should be further expanded.

The holders of a position should take part during the doctorate time, beside the scientific activities, actively in the education of students. This occurs through care of HIWI, bachelor and master works as well as the independent development of lectures, exercises and training periods. Also new teaching offers should be provided together with the chair owner.

The position is limited first of 2 years. Lengthening of the employment contract allows a maximum doctorate time of 5 years.

The employment is directed according to the wage agreement of the countries (TV L). The classification occurs by presentation of the personal or agreed conditions in the group E13 of TV L.

Travel expenses for interviews are not refunded.

Should you have interest in the position, send please your application papers by mail in a pdf file until May 15th , 2012 with the usual application papers as well as a statement about your earliest possible entry appointment to
michael.huebner@rub.de

For snail mail use:

Prof. Dr.-Ing. Michael Hübner
Lehrstuhl für Eingebettete Systeme der Informationstechnik (ESIT)
Ruhr-Universität Bochum
Universitätsstrasse 150
44780 Bochum, ID 1/341

We want to promote at the Ruhr University of Bochum particularly the careers of women in the areas in which they are underrepresented and, hence, are glad very much about applicants. Also the applications of disabled persons are welcome.

Postdoctoral Research Associates

ECE Department

Virginia Tech

Two postdoctoral positions are available at Virginia Tech’s (www.vt.edu) ECE Department (ece.vt.edu) on concurrency refactoring and scalable multicore OS projects. Recent computer science or computer engineering PhD graduates with background in compilers are sought for both positions.

The refactoring project involves automatically converting legacy sequential codebases to exploit multicore parallelism through code transformations at intermediate representation level (e.g., bytecode rewriting) and subsequent speculative execution (e.g., transactional memory). The position involves developing compiler techniques that enable such code transformations and building them into experimental compilers, and developing  runtimes/virtual machines with TM support. Background in LLVM is especially sought for this position.

The scalable multicore OS project’s position involves developing compiler techniques that enable automatic, compile-time and runtime code partitioning, allocation, and optimization to exploit multicore heterogenous hardware. A particular interest of the position is to develop just-in-time compilation techniques that cooperate with OS scheduling subsystems to enable highly efficient code/resource scheduling on heterogenous hardware. Candidates with background in back-end compiler optimizations, code generation, register allocation, instruction scheduling, etc., are particularly sought for this position. Knowledge of Intel TBB, OpenCL, OpenMPI or similar libraries is a plus.

Both positions are for two-year minimum, with strong possibilities for additional years, and have no teaching obligations. Contact Prof. Binoy Ravindran (www.ece.vt.edu/faculty/ravindran.php; binoy@vt.edu) with a CV or for any questions.

** Overview **

One PostDoc and one PhD / Research Assistant Position in JIT Compilation for Overcoming Multicore Processor Errors

The University of Cambridge

Deadline 20 April 2012

PostDoc / Research Associate: http://www.jobs.cam.ac.uk/job/-14891/

PhD / Research Assistant: http://www.jobs.cam.ac.uk/job/-14861/

** The Project **

Two positions exist with the Computer Architecture Group within the University of Cambridge Computer Laboratory for a PostDoc (Research

Associate) and Research Assistant (with the option of studying for a

PhD) to work on reliability schemes for multicore processors. The aim of the research is to use dynamic compilation techniques (JITs) to delay processor wearout and overcome architectural faults that will manifest during a chip’s lifetime. This will be achieved through the use of static and dynamic information during compilation and runtime, enabling the generation of fault-aware programs that will cause the minimum amount of ageing whilst running, and still execute correctly on error-prone processors. The project is funded by EPSRC, jointly with the University of Manchester, and there will be significant opportunities for visits and collaboration between the two groups.

The successful candidates will have a strong background in compilers and computer architecture. Preference will be given to candidates with experience in low-level compiler optimisations, JITs, microarchitecture and reliability techniques. Furthermore, experience in simulation of multicore programs will be a significant advantage. The appointment start date is negotiable but would ideally be the 16th June 2012.

** More Information **

Further details may be obtained from Dr Timothy Jones, email:

timothy.jones@cl.cam.ac.uk

** Application **

For the PostDoc / Research Associate position, please follow the instructions on this page: http://www.jobs.cam.ac.uk/job/-14891/

For the PhD / Research Assistant position, please follow the instructions on this page: http://www.jobs.cam.ac.uk/job/-14861/

Applications should include:

- A CV

- A completed form CHRIS6:

http://www.admin.cam.ac.uk/offices/hr/forms/chris6/ (parts 1 and 3 only)

Applications should be sent, preferably by email to personnel-admin@cl.cam.ac.uk. Postal Address: Personnel-Admin, University of Cambridge, Computer Laboratory, 15 JJ Thomson Avenue, Cambridge, CB3 0FD

The Electronic Systems group has an open position for a postdoctoral researcher with duration of three years, starting immediately. The position is funded by a European project called Time-predictable Multi-Core Architecture for Embedded Systems (T-CREST) that has eight industrial and academic partners from across Europe.

Project overview:

In the context of safety-critical embedded systems, the mission of T-CREST is to develop a Time-predictable Multi-Core Architecture and associated tools for Embedded Systems. The idea behind the system is to make the worst-case (as opposed to the common case) fast and the whole system easy to analyze formally.

The TU/e has two main contributions: 1) Virtualizing interrupts per application, such that each application can use its own preemptive task scheduling strategy. This research will impact the processor architecture, the RTOS, (application-specific) task schedulers, and the hardware – RTOS – application interfaces. 2) Designing a time-predictable reconfigurable memory controller, capable of providing real-time service to applications during use-case transitions, which involves architecture design and performance analysis.

The research takes place in the larger context of the CompSOC platform (see www.compsoc.eu), and the CompSOC team of around 12 people. This team is part of the Electronic Systems group of the Electrical Engineering Faculty of the TU/e.

The successful candidate is expected to contribute to the research topics in the project, guide PhD candidates and master students, and assist with project management.

Required Experience:

We invite excellent candidates to apply.  Candidates must have a Master and PhD degree in computer science, electrical engineering, or embedded systems, with excellent grades, and a publication track record in relevant conferences and journals. Familiarity with embedded systems architectures and real-time systems (analysis) is required. Practical experience of C/C++ and SystemC programming, and hardware design using VHDL/Verilog is recommended.

The candidate should have experience in supervising and guiding master students, and preferably also PhD students. Being a team player is essential, both in terms of integrating socially and technically in a larger team with diverse topics (hardware, software, analysis, tooling), and in terms of supervising students.

Appointment and salary:

Postdocs start with a gross monthly salary of at least € 2861 per month, depending on prior experience. Moreover 8% bonus share (holiday supplement) is provided annually. Assistance for finding accommodation can be given. The university offers an attractive package of fringe benefits such as excellent technical infrastructure, child care, savings schemes, and excellent sports facilities.

Information and Application:

For more information, or to apply for the position, please visit http://jobs.tue.nl/en/job/postdoc-timepredictable-multicore-architecture-for-embedded-systems-tcrest-147624.html

Barcelona Supercomputing Centre hosts the most powerful supercomputer in Spain and performs world-class research into computing systems. The centre has been very successful in European projects and also has various joint research centres with industry leading technology companies. The BSC is one of only eight Spanish research centres to be awarded the prestigious Severo Ochoa grant awarded to the very best Spanish research centres, internationally amongst the most competitive in their field.

BSC has numerous positions open for talented and motivated researchers in various projects:

• Computer Science Engineer: Ref: Predoc_Parall

http://www.bsc.es/about-bsc/employment/vacancies/predocparall

• PRACE Researcher: Ref: PRACE-CS-1

http://www.bsc.es/about-bsc/employment/vacancies/prace-cs-1

• Postdoctoral Researcher in Electromagnetic Simulations. Ref: Postdoc_EM

http://www.bsc.es/about-bsc/employment/vacancies/postdocem

• Postdoctoral Researcher in Mesh Generation. Ref: Postdoc_MESH

http://www.bsc.es/about-bsc/employment/vacancies/postdocmesh

• Support & Application consultant. Ref : US _12

http://www.bsc.es/about-bsc/employment/vacancies/us-12

• Postdoc position for hardware design and certification against standards in real-time automotive systems. Ref: Postdoc_VeTeSS

http://www.bsc.es/about-bsc/employment/vacancies/postdocvetess

• Support developer of the DEEP runtime and compiler infrastructures. Ref: PM_DEEP_Position

http://www.bsc.es/about-bsc/employment/vacancies/pmdeepposition

• Developer Material Sciences. Ref: Dev_MS

http://www.bsc.es/about-bsc/employment/vacancies/devms

To apply, please upload your CV or Resume and your cover letter to the reference vacancy at: http://www.bsc.es/about-bsc/employment/vacancies.

For further information: http://www.bsc.es/about-bsc/employment/vacancies

Position: Postdoctoral Research position in Autotuning Software Technology

Institution: University of Utah, Salt Lake City, UT, USA

Start date:  June 15, 2012, duration 1-2 years

The Center for Parallel Computing at Utah (CPU) and the Compiler Technology to Optimize Performance (CTOP) research group at University of Utah are seeking applicants for up to two postdoctoral positions to develop autotuning software for high-performance code generation on today’s high-end and future exascale systems. Autotuning empirically evaluates a search space of possible implementations of a computation to identify the implementation that best meets its optimization criteria (performance, power, or both).  The candidate will participate in several multi-institution collaborations to develop autotuning software technology to target next-generation architectures, including the Nvidia-led DARPA Echelon project, and the Department of Energy Scientific Discovery through Advanced Computation (SciDAC) Institute for Sustained Performance, Energy and Resilience (SUPER). 

The ideal candidate should have a strong background in programming language implementation, and parallel programming. A background in polyhedral compiler technology and scientific computing are also desirable, but not required.  The position will begin in Summer, 2012.  Applications received by April 17, 2012, will be given highest consideration.  Salary is competitive and commensurate with background and experience.

Education: A Ph.D in computer science, computer engineering, or a related field is required.

Location: University of Utah is located in Salt Lake City, a metropolitan area of over 1 million people, but only 30 minutes from world-class skiing, with nearby hiking, mountain climbing, national parks and other outdoor recreation. 

To apply, please send a cover letter and a curriculum vita, including contact information for two references, to Prof. Mary Hall (mhall@cs.utah.edu).

General info:

http://www.cs.utah.edu/research/groups/ctop/

http://www.parallel.utah.edu/

http://super-scidac.org/

Open Post-Doc Position at Carnegie Mellon University (USA)

We are looking for a top candidate to join our research group (http://www.ece.cmu.edu/~sld/) as a Postdoctoral Associate, starting Summer 2012. The Postdoctoral Associate will interact with a few faculty involved in a research project related to fundamental challenges in energy-aware multicore systems design and optimization.
Main responsibilities are related to investigating various HW and SW research issues related to power management and optimization of massively integrated multicore platforms, where communication happens via the network-on-chip approach. The main goal of this research is to address the fundamental issues of designing effective and highly scalable control algorithms for power and thermal management in multi-domain multicore systems.
Interested candidates must hold a Ph.D. in computer science, computer engineering, electrical engineering or related fields, with experience in one or more of the following areas: multicore system design, performance analysis, control theory, distributed systems, computer/software architecture and/or HW/FPGA prototyping.
The position will begin with an initial two year appointment with the possibility of renewal for one additional year. Salary is competitive and commensurate with background and experience.
Applicants should email their CVs, brief research statements, interests and contact information, to Prof. Radu Marculescu (radum@cmu.edu).
Contact info:
Prof. Radu Marculescu
Department of Electrical and Computer Engineering
Carnegie Mellon University
Pittsburgh, PA 15213-3890
Email: radum@cmu.edu

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Postdoctoral position at LIAFA, Paris, France

*****************************************************************************************

+ Title: Verification of Counter Systems

+ Abstract:

In order to represent the behavior of complex software systems, numerous models have been proposed among them the class of counter systems which are finite automata whose transitions are labelled by guards and updates on integer variables. It is well known that most of the verification problem are undecidable for very simple counter systems manipulating only two integer variables, however many restrictions have been proposed on these systems in order to regain decidability. Many abstractions techniques have also been developed in order to solve approximatively verification problems on this family of systems. The thematic of the post-doctoral stay could follow one (or both of) the following

axis:

1. How to compose decidable classes of Petri nets.

The restrictions proposed to gain decidability in counter systems restrict either the syntax of the model (like in Vector Addition System with States or in flat counter

systems) or its semantic (like

in reversal-bounded counter machines). We wish to investigate in which measure different restrictions on counter systems can be composed in order to obtain larger class of systems for which decidability of verification problems still holds. Our objective are both to perform a complete analysis of the decidability status of some classical verification problem (reachability, safety, liveness,etc) taking into account different compositions.

2. Development and implementation of efficient techniques to analyze counter systems.

There already exist tools to analyze counter systems likeTREX, FAST, FLATA, ASPIC, etc. But most of these tools only study reachability properties by computing the reachability set and when their approach computes an approximation of the reachability set, they either do under-approximations or over-approximations. The idea would be to build another tool that could compute under and over approximation of the reachability set but also could verify other properties than reachability.

Furthermore this tool could implement different algorithms according to the property that one wish to verify, the aim being to be efficient.

+ Length of the postdoctoral stay: 12 months

+ Beginning date: Before the 1st of June 2012

+Supervisors:

-Arnaud Sangnier

Assistant Professor

LIAFA – Université Paris Diderot – Paris VII

http://www.liafa.jussieu.fr/~sangnier

-Stéphane Demri

Senior Researcher

LSV – CNRS – ENS Cachan

http://www.lsv.ens-cachan.fr/~demri

+Location:

LIAFA (Laboratoire d’Informatique Algorithmique: Fondements et

Applications)

http://www.liafa.jussieu.fr

In the team Modelisation and Verification leaded by Professor Ahmed Bouajjani

+Salary: 2100 euros per month

+Source of funding: DIGITEO (http://www.digiteo.fr/)

+Contact: sangnier@liafa.jussieu.fr, demri@lsv.ens-cachan.fr

A 12-months software engineer position is opened at Télécom SudParis (Evry,

France) in the HP2 team.

Position: Software engineer

Salary: 2300 euros per month

Contract duration: 1 year

Location: Télécom SudParis, Evry (Paris area), France

Contact: francois.trahay@it-sudparis.eu

Keywords: MPI, HPC, Performance analysis, embedded systems

The HP2 research team at Télécom SudParis is looking for a software engineer to join the developer team of the EZTrace performance analysis framework.

Mission:

Available under the GPL2 licence, EZTrace is a performance analysis tool developed at Télécom SudParis and INRIA Bordeaux. EZTrace permits to trace the execution of parallel programs (MPI, OpenMP, etc.) in order to analyze their performance. Currently, EZTrace is only available on "standard"

supercomputers, but we intend to port it on supercomputers that use technologies from the domain of embedded systems.

The software engineer mission will be to port EZTrace to new architectures:

Adapt EZTrace so that it can run with a restricted software environment.

Improve EZTrace scalability

Implement new EZTrace modules that collect data specific to these supercomputers.

In addition to the development of new features, the engineer will participate to the diffusion and maintenance of EZTrace.

Profile:

M. Sc. or Ph. D. degree in Computer Science

Knowledge and skills in High Performance Computing (MPI, OpenMP, etc.)

Knowledge and skills in operating systems such as Linux

Strong skills in C programming

Application:

Please apply by sending your resume and at least one recommandation letter to François Trahay (francois.trahay@it-sudparis.eu)

http://www-public.it-sudparis.eu/~trahay_f/research/positions/sujet_inge_en.html

Postdoctoral Position within the Area of Energy Efficient Computing Systems (EECS) Norwegian University of Science and Technology (NTNU) Deadline for application: Mon, 2012-03-12 Url of advertisment: http://www.jobbnorge.no/job.aspx?jobid=81275

A post-doctoral position in the area of Energy Efficient Computing Systems (EECS) is available at the Department of Computer and Information Science (IDI), Faculty of Information Technology, Mathematics and Electrical Engineering (IME), Norwegian University of Science and Technology (NTNU).

Energy efficient operation is becoming a major requirement from the smallest to the largest computing systems. For high performance systems, we have reached the limits of economically viable cooling systems and packaging technologies. Battery powered devices are continually expected to deliver more advanced functionality, but battery capacity is not increasing fast enough. Finally, there are a number of systems where replacing batteries is costly or even impossible. By making computer systems more energy efficient, we can also reduce the demand for electricity and thereby reduce carbon emissions. Due to the very large number of electronic devices, a small improvement in each system can result in a large energy reduction on a global scale.

*** The candidate will contribute to research aimed at improving the energy efficiency of selected applications. A key enabling task is to collect accurate and timely energy measurements on state-of-the-art hardware platforms, and correlate these measurements with application behavior ***.

The candidate should have a PhD in Computer Science as well as a solid knowledge of computer systems, computer architecture and computer hardware. Strong programming skills, experience with programming close to hardware and a can-do attitude is essential. The postdoctoral position is for two years.

Further information on the position can be obtained from group leader Associate Professor Magnus Jahre (magnus.jahre@idi.ntnu.no) or Professor Lasse Natvig (lasse.natvig@idi.ntnu.no).

The formal job announcement and application form is available here:

http://www.jobbnorge.no/job.aspx?jobid=81275

(some of the details quoted below)

Trondheim has a large and expanding HW and SW industry, with many small start ups and also big companies like ARM, Nordic Semiconductor, ATMEL, Microsoft, Yahoo, plus a lot of oil & energy companies with substantial supercomputing activity. Our research group has excellent collaboration with the local industry and our focus at energy efficiency is also supported by the leadership at NTNU.