Call for Papers

A fully funded Ph.D. studentship position is available at the Computer Science Department of Télécom SudParis, France (http://www.telecom-sudparis.eu/en_accueil.html).

Scientific context:

Future supercomputers will be equipped with heterogenous hardware as multicore chips and accelerators. While hardware tends to become massively parallel providing hundreds of cores, parallel programming must provide a way to exploit both the heterogeneity and the potential scalability of the hardware.

High Pperformance Computing community has a long experience of parallel programming. The most popular programming standard in HPC are directive-programming with OpenMP for shared-memory architectures and message-passing programming with MPI for distributed-memory architectures.

There is an important need for these standard to evolve to take into account heterogeneous hardware where different parts of a single program will be executed on different kinds of hardware.

Various programming models can be studied as:

directives, components, skeletons or any vendor languages.

Goal:

The goal of this PhD thesis is to work on a programming model to increase parallel programming productivity. Our proposition is based on high-level directive programming combining the programmer expertise and static program analyses. This thesis should increase this model to take into account hybrid or heterogeneous architectures.

Required skills:

The candidate must have excellent knowledge in:

- Parallel programming

- Compilation

- C language and Unix systems

Contact: frederique.silber-chaussumier@it-sudparis.eu

Candidates should reply to this mail providing the photocopy of the original degree certificate, the list of courses and grades, a letter of motivation and a recommandation letter.

Please don’t hesitate to contact us for further information.

–

Frédérique Silber-Chaussumier Tél: +33(0)160764565 Institut Télécom, Télécom SudParis (ex GET/INT) Computer Science Department, 9 rue C. Fourier 91011 Évry, France

PhD Research Studentships in the Computer Architecture Group Computer Laboratory, University of Cambridge

Applications are invited from students with backgrounds in computer science or electronic engineering for a PhD studentship at the Computer Laboratory, University of Cambridge. The successful candidate will join an EPSRC funded project which is investigating a novel massively-parallel single-chip processor architecture targeting high-performance embedded applications. Research is currently being pursued at the language, compiler and architecture levels. Future work will aim to perform a detailed exploration of the on-chip network and microarchitectural design space and explore the application of novel circuit-level techniques. A successful applicant would join a small, but highly motivated, group of researchers exploring a broad range of exciting problems.

A few more details about the Loki project can be found here:

http://www.cl.cam.ac.uk/~rdm34/loki/

An excellent academic track record is essential (1st class honours degree). Projects exist for students with both computer science or electronics/VLSI backgrounds, although a good understanding of computer architecture is necessary in either case.

The EPSRC studentship offers full costs (fees plus stipend) for 36 months for UK and EU citizens, who satisfy the eligibility criteria of the UK Research Councils. The studentship is not available to citizens of non-EU countries. There is also an additional EPSRC CASE funded studentship available with ARM Ltd. in a related area.

Informal enquiries may be made to Dr. Robert Mullins, Computer Laboratory, University of Cambridge (Robert.Mullins@cl.cam.ac.uk).

A fully funded Ph.D. studentship position (* see below) within the PHOTONICA research project (PHOTONICA: Photonic Interconnect Technology for Chip Multiprocessing Architectures) is available at the Department of Information Engineering (www.dii.unisi.it) of the Universita’ di Siena, Italy.

The main project topics to be developed in Siena will be a) the exploration CMP architectures that take advantage from on-chip photonic interconnection networks, in conjunction with b) the development of specific compiler and/or OS and/or runtime optimizations to maximize the utilization of the available on-chip resources.

The three-year PHOTONICA project aims at exploring architectures endowed with both passive and active (reconfigurable) photonic networks, studied by the research group at the Universita’ di Ferrara, and employing the advanced photonic low-level devices studied by the Politecnico di Bari research group.

Research activities in Siena will be performed in collaboration with the Universita’ di Pisa (www.iet.unipi.it) and with other European institutions.

Call url: http://www.dii.unisi.it/~bartolini/201007-PhotonicaPhd.html

We are seeking applicants with strong motivation in computer architecture and, in particular, in the following topics:

- CMP architectures, memory hierarchies and system simulation

- Performance evaluation

- profile-guided feedback-driven optimization

Good knowledge of written and oral English is required and the following skills are positively considered:

- good programming abilities (C/C++, Java)

- experience in using/modifying architectural simulators

- ability to work autonomously and in team

NOTE

Due to project funding constraints, the applicant should be less than 32 years old.

SALARY and LOGISTIC

As the salary will be paid directly from the project so, please, neglect the standard salary indications in the PhD call documentation. It will be in the 18-20 keuro range, per year. For further details send in an email.

A personal laptop will be available to the PhD student from the second year.

Our PhD school is part of the ITALIAN EXCELLENCE CENTER "Superior School Santa Chiara" http://www.unisi.it/santachiara/ Candidates are welcome to apply for a hosting in this facility which is 100 meters from our Faculty.

HOW TO APPLY (*)

1) Please, send an email as soon as possible (and before the July 28th application deadline) to the main investigator of the University of Siena research group, Sandro Bartolini (bartolini@dii.unisi.it), including a covering letter, curriculum vitae and, possibly, contact details (email) of one or more referees.

Don’t wait till the last day because bureaucratic procedures (see point

2) need a bit of time.

2) The next step will be the formal application, by *July 28th*, to the PhD selection procedure of the University of Siena (see

http://dottorati.unisi.it/bandi/bando_traduzione_xxvi_giugno_ing.pdf)

preferably through the on-line procedure (http://dottorati.unisi.it/domande/elenco_proposte_26_giugno_ing.asp).

Further info: http://www.unisi.it/v0/pagina_en.htm?fld=2871

(*) NOTE: the position is open also to MSc graduates, younger than 32 years old, not wishing to go through the PhD program in Siena and not having the PhD degree yet. In that case, simply go through the step 1).

IMPORTANT DATES

- selection dates: to appear at http://dottorati.unisi.it/concorsi

- formal start of PhD program: October 1st

ADDITIONAL INFO

- Our research group is part of the HiPEAC NETWORK OF EXCELLENCE:

http://www.hipeac.net

- UNIVERSITY OF SIENA: http://www.unisi.it

- DEPARTMENT OF INFORMATION ENGINEERING: http://www.dii.unisi.it

- ABOUT SIENA: http://en.wikipedia.org/wiki/Siena

A fully funded Ph.D. studentship associated with the EPSRC-funded Bridging the Gaps:NanoInfoBio (NIB) project (http://www.nanoinfobio.org) is available at the Department of Computing and Mathematics, Manchester Metropolitan University. The main objective of NIB is to encourage interdisciplinary research between chemistry, informatics, biology, engineering, mathematics and biomedical science within MMU. In particular, this studentship will investigate:

Hardware Based Computational Biology: (Dr Andy Nisbet, Dr Helen Ji, Dr Qiuyu Wang and Dr Martyn Amos).

Computational biology is concerned with the application of algorithmic techniques to the solution of problems in the life and health sciences.

The various genome projects currently underway are generating massive amounts of raw data, which, combined with other data, must be understood within a systems framework if we are to understand and treat disease.

Many algorithms in common use are computationally intensive, and require expensive hardware clusters. In addition, many of the operations required by bio-based algorithms do not translate well to existing processor instruction sets. However, reconfigurable hardware accelerators (FPGAs) offer an alternative framework for the development of optimised hardware for computational biology. This project will investigate methods for the automated solution of biological problems, using such a hardware platform.

The successful candidate will be based in the Novel Computation Group within Computing and Mathematics.

Start date: no later than 1st September 2010

Applicants with backgrounds in one or more of electronic engineering, computer science and computational biology are encouraged. The minimum qualification required is an upper-second class degree (or equivalent) in a relevant discipline (a relevant Master’s qualification would be ideal). Experience of hardware design (using high or low-level synthesis

tools) and/or computational biology would be extremely beneficial. The studentship fully covers University tuition fees (at EU/UK level) and provides a tax-free bursary of £12K p.a. This vacancy is only available to U.K. or EU citizens.

To apply, in the first instance please e-mail Dr Andy Nisbet

(a.nisbet@mmu.ac.uk) with a covering letter, curriculum vitae and contact details (preferable e-mail) of at least two referees.

Deadline for applications is July 16th

We are pleased to announce the availability of funded PhD positions in the Compiler Technology and Computer Architecture group at the University of Hertfordshire. The positions comprise an open studentship and we expect prospective candidates to propose their own line of research within the group’s wide area of interest.

The University of Hertfordshire near London was one of the first academic institutions in the United Kingdom to offer a degree in computer science. Today, the university is the UK’s leading business-facing university with strong industrial ties and an international outreach.

The Compiler Technology and Computer Architecture group is part of the School of Computer Science and the Centre for Computer Science and Informatics Research. Our research is focused around the interface between software and computer architectures. We are the main contributors for the two programming languages Single Assignment C and S-Net, both of which cater for high-level specifications of concurrent programs.

Single Assignment C is a functional array-programming language with a C like syntax and APL/MATLAB like programming model. The corresponding compiler suite has been in development for 15+ years. Today, it supports auto-parallelisation for a range of architectures, including legacy multi-cores and NVIDIA CUDA. Current research focuses on extending the reach of SAC to novel architectures like the University of Amsterdam’s Microgrid and Intel’s SCC.

S-Net is a language for concurrency engineering. S-Net programs are algebraic formulae that describe the communication pattern of an algorithm on an abstract level. Using our compilation technology, we are able to generate concurrent and distributed implementations from an S-Net specification. Current research in S-Net focuses on adaptivity, real-time support and extending the platform reach.

Across both languages, we are interested in the generalisation of parallel programming principles. As part of the Google summer of code, we contribute generalised high-level vector primitives to the GCC project. We work on abstractions for broad-ranged run-time systems supporting various forms of concurrency. This work applies modern operating systems aspects across various platforms including GPGPUs, FPGAs and embedded systems.

Our work also embodies applications of recent advances in type theory to further enhance expressiveness and to boost run-time efficiency. Ongoing projects include work on a user-specifiable type-system for SAC and a redesign and extension of the S-Net type-system using qualified types and extensible record-types. Furthermore, we are interested in using partial evaluation and abstract interpretation techniques to solve problems that were usually addressed by type systems and SMT solvers.

Adequate spoken and written English skills, as well as command of a functional and an imperative programming language are required. A good bachelor’s degree is mandatory, a master’s degree a plus. Our group is international and we cooperate widely. Good communication skills, an interest to present on international venues as well as the ability to play in a team are essential.

Further details on the available PhD positions can be found at http://www.jobs.ac.uk/job/AAZ241/phd-studentships/

The deadline for applications is the end of May. However, shortlisting will start 19th of May.

Details on the group can be found at the group’s website http://ctca.feis.herts.ac.uk/

Previous and current projects include

http://www.aether-ist.org self-adaptive computing

http://www.apple-core.info multi-core architectures and programming models

http://www.project-advance.eu dynamic adaptation and optimisation

http://www.sac-home.org data-parallel array-programming language

http://www.snet-home.org language for concurrency engineering

Prospective applicants are encouraged to contact Sven-Bodo Scholz

(S.Scholz@herts.ac.uk) to discuss potential research projects before applying

A fully funded position for PhD studies starting in September 2010 is now available in the School of Informatics of the University of Edinburgh. Due to funding restrictions the position is only open to citizens of the European Union.

The PhD will be carried out under the supervision of Prof. Marcelo Cintra (www.homepages.inf.ed.ac.uk/mc) and within the renown CArD group (www.icsa.informatics.ed.ac.uk/compilers). The proposed work is on hardware prefetchers for future many-core systems with high-bandwidth 3D stacked DRAM. For more details on the project please contact Prof. Cintra at mc@staffmail.ed.ac.uk.

Prospective candidates should have completed, or expect to complete by September 2010, a “first-class” (i.e., being ranked at the top 10% of the class) B.Sc. or M.Sc. degree from a well established University. Candidates are expected to have a solid background in one or more of the following: computer architecture, optimizing compilers, parallel programming languages and systems, processor design, and operating systems. Also, programming experience in a major imperative programming language (e.g., C, C++, Java) is desired. Finally, reasonable fluency in English is expected.

Interested candidates should contact Prof. Cintra directly at mc@staffmail.ed.ac.uk providing a C.V. and a letter of reference. The deadline for applications is May 31st 2010.

The University of Edinburgh has been consistently ranked among the top Universities in the world by THES and ARWU. The School of Informatics has been ranked at the very top in the UK by the RAE since this UK government funded assessment began in 1992. The CArD group is one of the leading academic research groups in Europe in the areas of computer architecture, optimizing compilers, and parallel programming.

Eindhoven University of Technology

Faculty of Electrical Engineering

Eindhoven

The Netherlands

FTE 1.0

Application Deadline: 31-03-2010

Vacancy Number: V36.1076

The Faculty of Electrical Engineering concerns the research and education of the Electrical Engineering discipline. Electrical Engineering covers the application of electrical phenomena with respect to energy transfer, telecommunication, as well as calculation and processing of information, and the technology involved. Both hardware, in the form of electronic circuits and accessories, and software, in the form of system software for electro-technical applications, are the subject of study. Existing and new electrical components and systems are analyzed, designed and realized. In addition, the maintenance of these systems is the subject of research, as is the relevance of electrical engineering and informatics for society.

Position

The position is in the Section of Digital Circuits and Formal Design Methods (DCFDM) of the Electronic Systems (ES) Group. The mission of the ES Group is to provide a scientific basis for design trajectories of digital electronic circuits and systems ‘from (generalized) algorithm to realization’. To identify the key problems, and verify the validity, robustness and completeness of our results, we develop, implement and maintain consistent and complete flows, and use them for realizing innovative hardware with emphasis on video processing and embedded architectures. The mission of the DCFDM Section is research and development of theory, methods and EDA tools for modeling, analysis, synthesis and optimization of digital circuits and systems to adequately cope with the increasing complexity and challenges of the nano-electronic technologies. It has an internationally recognized expertise in design theory, methodology and electronic design automation for embedded system design and hardware synthesis. It has also experience with FPGA-based design, (re-)configurable architectures, multi-objective circuit and system optimization and automatic architecture synthesis for (heterogeneous) platform-based systems.

Project

The research work will be performed in the scope of the Architecture Synthesis and Application Mapping (ASAM) project, being a part of the European research program ARTEMIS. The ASAM project addresses the problem of an automatic coherent architecture synthesis and application mapping for heterogeneous multi-processor embedded systems based on configurable application-specific instruction-set processors (ASIPs). It aims at defining a new unified design methodology, as well as, related synthesis and prototyping tool-chains for: multi-objective design space exploration for configurable heterogeneous multi-ASIP systems and identification of the application-tailored system architecture; automatic architecture instantiation or customization of particular application-tailored processors, memories and communication structures of the system architecture; optimal hardware synthesis of the created platform; automatic application mapping on the resulting multi-processor heterogeneous platform; and software compiler retargeting and automatic software compilation, all when accounting for the platform hardware characteristics and for the functional and extra-functional requirements and trade-offs.

The research work will be focused on the automatic architecture instantiation or customization of the application-tailored ASIPs, including their extension with new application-specific instructions and related hardware, optimal synthesis of the ASIPs’ hardware, and collaboration of these micro-architecture and hardware synthesis tasks with the memory and communication architecture synthesis, as well as, with the macro-architecture synthesis of the whole heterogeneous multi-processor system.

Tasks

The research work in the scope of the above described project involving development of new design methods, and related electronic design automation (EDA) analysis and synthesis flows and tools, software implementation of the prototype EDA tools and flows, and experimental research with their use.

Requirements

Candidates for this PhD position should meet the following requirements:

• MSc in Embedded Systems, Computer Engineering, Electronics, Electrical Engineering, Information Technology or related area, with an advanced knowledge or minor/majors in subjects related to electronic design automation, (embedded) processor architectures and/or SoC design;
• a solid knowledge of and substantial experience in software design and programming, including knowledge of and experience with programming in C++ and/or C;
• excellent invention and learning abilities;
• excellent analytical, organizational and communication skills, including an ability of effective and efficient individual work, as well as, easy cooperation in a team with supervisors, students, other researchers and companies, and excellent English language capabilities both in writing and speaking;
• a substantial knowledge of or experience with ASIP processors, instruction-set synthesis, (re-)configurable systems, FPGA-based design and prototyping, and related EDA tools will be a premium.

Appointment and Salary

The appointment is for four years. The research in this project must be concluded with writing a PhD thesis. A salary is offered starting at EUR 2042 per month (gross) in the first year and increasing up to EUR 2612 per month (gross) in the last year. Moreover 8% bonus share (holiday supplement) is provided annually. Assistance for finding accommodation can be given. The university offers an attractive package of fringe benefits such as excellent technical infrastructure, child care, savings schemes, and excellent sports facilities.
TU/e offers you also the opportunity for personal development by developing your social and communication skills. We do this by offering every PhD student a series of courses that are part of the Proof program as an excellent addition to your scientific education (Proof program).

Information

For more information on the project, tasks or requirements please contact Dr. ir. L. Józwiak, tel. +31-(0)40-2473645, e-mail: L.Jozwiak@tue.nl.
For terms on employment please contact: Mr. P.F.M. Tiel Groenestege, HR advisor of the Faculty of Electrical Engineering tel. +31-(0)40-2472004, e-mail: p.f.m.tiel.groenestege@tue.nl .

More information and on-line application form can be found on the TU/e web-pages:

http://jobs.tue.nl/wd/plsql/wd_portal.search_results?p_web_site_id=3085&p_category_id=3713&p_show_results=Y&p_form_type=CHECKBOX&p_no_days=999&p1=6047&p1_val=Any&p2=6048&p2_val=Department+of+Electrical+Engineering&p_text=&p_save_search=N

and

http://w3.tue.nl/en/services/dpo/excellent_jobs_for_excellent_people

We are pleased to announce up to 20 available PhD positions in all the research areas of the Advanced Processor Technologies Group (http://www.cs.manchester.ac.uk/apt). Next deadline for applications is March 19th 2010.

Examples of current research projects follow:

- SpiNNaker: a universal Spiking Neural Network architecture http://www.cs.manchester.ac.uk/apt/projects/SpiNNaker/

- Research in Transactional Memory and Many-cores http://www.cs.manchester.ac.uk/apt/projects/TM

http://www.teraflux.eu

- SEDATE: Algorithms and Tools for the synthesis of self-timed datapaths http://www.cs.manchester.ac.uk/apt/projects/sedate

- GALAXY: Globally asynchronous, locally synchronous interface for complex digital system integration.

http://www.cs.manchester.ac.uk/apt/projects/galaxy/

- iTLS: Intelligent run-time parallelization in managed virtual environments (e.g. Java Virtual Machines).

http://www.cs.manchester.ac.uk/apt/projects/iTLS

Silistix (http://www.silistix.com/) and Transitive (recently acquired by IBM) are two spin-off companies commercializing research carried out by the APT group.

More information about the members of the group and their research interests can be found at http://www.cs.manchester.ac.uk/apt/people/

Specifics about the PhD studentships can be found at http://www.cs.manchester.ac.uk/phd/funding/

Applications are invited for a PhD position in Networks on Chip/Communication Systems at Simula Research Laboratory in Oslo, Norway. The position is funded by an EU prosject under the 7th Framework Programme (call 4) and the position will therefore be tied to this project. The project contains partners from six different European countries and will explore design methods for system on chip (SoC) solutions. Simulas role in the project will be to design a flexible Network on Chip technology which can be adapted to application and design constraints. The PhD position lasts for three years and the chosen candidate will be enrolled in the PhD-program of Simula School of Research and Innovation. The final degree will be awarded by the University of Oslo, Norway.

Candidates should preferably have a strong background in Networks on Chip and computer networks in general. In particular, we look for candidates with experience with network on chip design and evaluation. Eligible applicants are people with:

• A Master of Science in computer science or a related area.
• A strong background in computer networks and computer architecture.
• Strong programming skills.
• A good ability to cooperate with others.
• A good ability to work independently on challenging problems.
• Good written and spoken English skills.

The ideal candidate would be able to show evidence of her interest in network research and technology through scientific or other types of publications, or through extracurricular activities. Successful applicants will be part of a dynamic and highly competent team in the ICON group at Simula.  More information about the group is available at http://simula.no/research/networks/projects/ICONPRO/.

About Simula Research Laboratory AS

Simula Research Laboratory AS was established in 2001 as a limited company with the Norwegian Government as the principal shareholder.  Simula conducts basic research in the fields of communication technology, scientific computing and software engineering with a focus on fundamental scienfic problems that have a large potential for important applications in society.  We offer a competitive salary that reflects that we are hand-picking only top candidates. The successful candidate should not need additional funding.

Simula maintains an open, international and diverse work environment, and seeks applications from outstanding scientists regardless of their national origin or citizenship. Female applicants are encouraged to apply

Simula School of Research and Innovation delivers education in partnership with the industry and the universities in Norway. The School actively supports and creates the conditions necessary for the establishment of businesses based on the research it conducts. The PhD students will be formally employed by – and enrolled in the PhD-program of Simula School of Research and Innovation. However, the PhD degrees will finally be awarded by the University of Oslo, Norway.

Enquiries and Further Information

To apply for these positions, email a short application letter, curriculum vitae, copies of transcripts and grades and a publication list to jobs@simula.no. You can find the position opening online at http://simula.no/jobs/jobs-0940.

Important

The subject of the email must contain JOBS 0940 ICONPRO. The application deadline is January 31, 2010.

Please direct any questions regarding these positions to Dr. Frank Olaf Sem-Jacobsen (frankose@simula.no). Note that only questions should be sent to this address. Applications and documents must be sent as described above.

Manchester Metropolitan University

The Department of Computing and Mathematics at Manchester Metropolitan University has a leading reputation for research excellence. In the 2008 Research Assessment Exercise, 75% of Computer Science Informatics research was judged to be at least "internationally recognised", and 35% was deemed to be at least "internationally excellent". As a result of this, the Department has secured significant research funding, and, with the support of the MMU Dalton Research Institute, we are able to offer four fully-funded* Ph.D. studentships in the following areas:

Novel Computation (http://www.docm.mmu.ac.uk/RESEARCH/ncg)

• Simulation of Biologically-inspired Computational Models (Dr  Andy Nisbet and Dr Martyn Amos)
• Synchronization in Coupled Systems with Time Delays (Dr Jon Borresen and Dr Martyn Amos)

Logic and Computation (http://www.docm.mmu.ac.uk/RESEARCH/logicgrp)

• Logical Consequence Relations and Inference Rules in Logics Originating in Artificial Intelligence and Computer Science (Prof. Vladimir Rybakov)

Intelligent Systems (http://www.docm.mmu.ac.uk/RESEARCH/Intelgrp)

• Optimisation by Quantum Annealing (Dr Alan Crispin)

For further details of each of these projects, please see http://www.docm.mmu.ac.uk/RESEARCH/ncg/phd.pdf

Applicants for each studentship should possess a good (2.1 or above) honours degree (and preferably a higher degree such as an M.Sc.) or equivalent industrial experience, in any appropriate scientific or technological discipline (e.g. mathematics, physics, computer science). Each studentship fully covers University tuition fees (at EU/UK level*) and provides a tax-free bursary of £12,000 per year, in line with the UK Government (EPSRC) recommended rate, for a 3-year duration. *EU/UK fees £3,390 per annum. Overseas students are welcome to apply, but should be aware that they will be required to self-fund the difference between EU/UK and international fees (international fees are currently £9,065 per annum).

In order to apply for any of these studentships, in the first instance please send your up-to-date CV, along with a cover letter and details of two academic referees,  directly to the first-named supervisor of the project in which you are interested (to whom informal enquiries should also be addressed):

• Dr Andy Nisbet: A.Nisbet@mmu.ac.uk
• Dr Jon Borresen: J.Borresen@mmu.ac.uk
• Prof. Vladimir Rybakov: V.Rybakov@mmu.ac.uk
• Dr Alan Crispin: A.Crispin@mmu.ac.uk

The deadline for receiving initial applications is Friday 29th January 2010. Studentships will commence as soon as possible after that date.

For further information on the Department and its research groups, please visit http://www.docm.mmu.ac.uk