Call for Papers

ACM SAC 2009
24th ACM Symposium on Applied Computing
Honolulu, Hawaii, March 8-12 2009

www.acm.org/conferences/sac/sac2009

SPECIAL TRACK:

*——————————————*
EMBEDDED SYSTEMS
Applications, Solutions, and Techniques
*——————————————*

*——————————————*
CALL FOR PAPERS
*——————————————*

Higher and higher computing power is demanded by CPU-enabled devices currently used in everyday life. Embedded systems are nowadays present in an impressive number of different applications, from consumer electronics to biomedical systems, and the success of their employment is often determined by their functionality/cost ratio. Embedded software has recently developed towards new complexity levels, posing new challenging issues: the adoption of further flexible programming paradigms/architectures is becoming almost mandatory, taking also into account the multithreaded structure required to adequately exploit possible multicore CPUs. Nonetheless, the market pressure calls for the employment of new methodologies for shortening the development time and for driving the evolution of existing products. New efficient solutions to problems emerging in this setting can be put into action by means of a joint effort of academia and industry.
Design of embedded systems must take into account a wide variety of constraints: performance, code size, power consumption, presence of real-time tasks, maintainability, security and possibly scalability: the more convenient trade-off has to be found, often operating on a large number of different parameters. In this scenario, solutions can be proposed at different levels of abstraction, making use of an assortment of tools and methodologies: researchers and practitioners have a chance to propose new ideas and to compare experimentations.
The focus of this conference track is on the application of both novel and well-known techniques to the embedded systems development.
Particular attention is paid to solutions that require expertise in different fields (e.g. computer architecture, OS, compilers, security, software engineering, simulation).
The track will benefit also from direct experiences in the employment of embedded devices in \”unconventional\” application areas, so to show up new challenges in the system design/development process. In this setting, researchers and practitioners from academia and industry will get a chance to keep in touch with problems, open issues and future directions in the field of development of dedicated applications for embedded systems.

Topics of Interest

* Methodologies and tools for design-space exploration
* System-level design
* Architectural improvements for embedded systems
* Power-aware design techniques and computing
* Testing, debugging, profiling and performance analysis of embedded
systems
* Networked sensor devices and systems
* SoC-based embedded systems and applications
* Middleware solutions for embedded systems
* Multithreading in embedded systems design and development
* Software architectures and SOA for embedded systems
* Embedded systems exploitation within Information Systems
* Multimedia management in embedded systems
* Security and dependability support within embedded systems
* Embedded systems contribution in meeting security goals
* OS & RTOS for embedded systems
* Hardware/software support for real-time applications
* Compilation strategies for performance enhancement vs. footprint
control
* Code transformation and program parallelization for embedded systems
* Java embedded computing
* Special-purpose appliances and applications
* Case studies

Chairs: Alessio Bechini and Cosimo Antonio Prete – University of Pisa, Dept. of Information Engineering – Italy
*——————————————*
Program Committee
*——————————————*

Peter Altenbernd – Fachhochschule Darmstadt – Germany
Sandro Bartolini – University of Siena – Italy
Valerie Bertin – ST Microelectronics – France
Enrico Bini – Scuola Superiore Sant\’Anna – Italy
Jo=E3o Manuel Paiva Cardoso – IST/INESC-ID – Portugal
Lavinia Egidi – University of Northeastern Piedmont – Italy
Marc Engels – Flanders\’ Mechatronics Technology Centre, Leuven – Belgium Pierfrancesco Foglia – University of Pisa – Italy Bj=F6rn Franke – University of Edimburgh – UK Malay Ganai – NEC labs – USA
Roberto Giorgi – University of Siena – Italy
J=F6rgen Hansson – SEI, Carnegie Mellon University – USA
Niraj K. Jha – Princeton University – USA
Andreas Krall – TU Wien – Austria
Tei-Wei Kuo – National Taiwan University – Taiwan
Kenji Hisazumi – Kyushu University – Japan
Shih-Hsi Liu – California State Univ. at Fresno – USA
Gokhan Memik – Northwestern University – USA
Emre Ozer – ARM Ltd. – UK
Christian Poellabauer – University of Notre Dame – USA
Richard Schantz – BBN Technologies – USA
Yuriy Sheynin – AANET – Russia
Henk Sips – TU Delft – The Netherlands
Jean-Pierre Talpin – INRIA/IRISA – France
Miroslav Velev – consultant – USA
Tilman Wolf – University of Massachusetts Amherst – USA
I-Ling Yen – University of Texas at Dallas – USA

*——————————————*
Submissions
*——————————————*

Original papers addressing the listed topics of interest will be considered. Each submitted paper will be fully refereed and undergo a blind review process. Please note that submission of the same paper to multiple tracks is not allowed.
The accepted papers will be published in the ACM SAC 2009 proceedings.

Submissions instructions can be found directly on the track web site.

*——————————————*
Important dates
*——————————————*

* August 16th, 2008: Paper Submission
* October 11th, 2008: Author Notification
* October 25th, 2008: Camera-Ready Copy

Questions can be directed to the Track Chairs. Additional details are available at the track home page at www.ing.unipi.it/sac09 and at the conference home page at www.acm.org/conferences/sac/sac2009/.

14th WORKSHOP ON JOB SCHEDULING STRATEGIES FOR PARALLEL
PROCESSING
In conjunction with IPDPS 2009
Rome, Italy
May 29, 2009

Since our first workshop in 1995, parallel processing has evolved to the point where it is no longer synonymous with scientific computing on massively parallel supercomputers. The original platform for parallel processing now also include cloud systems, the Grid and multi-core and many-core processors. This has lead to a significant increase in users as well as in application types and numbers. The resulting expansion of the user community further emphasizes the importance of job scheduling in multi-user parallel systems. In addition, various new or so far neglected aspects of job scheduling are becoming more important, like scheduling in an interactive setting, coordinating the use of multiple non-CPU resources including various types of services, and coordination across multiple administrative domains and different resource owners.

Continuing the tradition established at IPPS\’95, the workshop is intended to attract people from academia, industry, supercomputing centers, national laboratories, Grid initiatives, and parallel computer vendors to address resource management issues in multitasking parallel systems, and attempt to resolve conflicting goals such as short response times for interactive work, minimal interference with batch jobs, fairness to users based on their priorities, and high system utilization. We aim to
balance between reports of current practices in the entire range from parallel desktops to large and heavily-used installations, proposals of novel schemes that have not yet been tested in a real environment, and realistic models and their analysis. The emphasis will be on practical designs in the context of real (parallel) operating systems and middleware as well as real application programs.

Topics of interest include:

* Benchmarking and performance metrics to compare scheduling schemes * Performance evaluation methodology and simulation of job scheduling * Experience with scheduling policies on production systems * Optimization of multiple-resource scheduling * Scheduling on multi-core systems, scalable SMP systems, and clusters * Resource discovery and scheduling in a Grid * Co-allocation of resources on different machines * Interaction of local schedulers and higher level schedulers * Infrastructure for resource management on clusters and grids * Workload characterization, classification, and modeling * Fairness, priorities, and accounting issues * Performance guarantees and QoS
* Load estimation and load balancing
* Scheduling on heterogeneous systems
* Support for different classes of jobs
* Time slicing and gang scheduling
* Effect of scheduling strategies on application performance * Interaction of scheduling with memory management and I/O
Please note that the focus of the workshop is on scheduling of parallel jobs. However, this includes grid scheduling with a limited number of job stages and dependencies and scheduling of mulitple jobs on multi-core architectures
SUBMISSION OF PAPERS:

Papers should be no longer than 20 single-spaced pages, including figures and references. All papers in scope will be reviewed.

Files should be submitted in PDF format. Authors must ensure that electronically submitted files are formatted for 8.5×11 inch paper. Submission procedures will be available six weeks before submission deadline via web access at the workshop site www.cs.huji.ac.il/~feit/parsched/. Please include the paper title and the name, address, phone, and email of contact author as plain text in the submission.

Important Dates:
DEADLINE: October 17, 2008
NOTIFICATION: December 5, 2008
FINAL PAPER DUE: February 15, 2009

Registration and proceedings:
This will be part of the IPDPS registration process and proceedings publication.
For details, see the IPDPS web site www.ipdps.org/

Workshop organizers:
Eitan Frachtenberg, Powerset
Uwe Schwiegelshohn, Technische Universit?t Dortmund

Program Committee:
Su-Hui Chiang, Portland State University
Walfredo Cirne, Google
Allen Downey, Olin College
Dror Feitelson, The Hebrew University
Allan Gottlieb, New York University
Andrew Grimshaw, University of Virginia
Moe Jette, Lawrence Livermore National Lab
Virginia Lo, University of Oregon
Jose Moreira, IBM
Reagan Moore, San Diego Supercomputer Center
Bill Nitzberg, Altair Grid Technologies
Mark Squillante, IBM
Dan Tsafrir, IBM
John Towns, NCSA
Jon Weissman, University of Minnesota
Ramin Yahyapour, Technische Universit?t Dortmund

ACM Transactions on Embedded Computing Systems (ACM TECS)

Special issue on Model-driven Embedded System Design

Call for papers

Embedded systems are omnipresent in modern society, and society crucially depends on their proper functioning. The complexity of embedded system design however is increasing rapidly, through the use of multiprocessor cores, through the integration of embedded systems in ubiquitous networks, and through the increasing interaction between embedded systems and their users and environments. To obtain a reliable operation of embedded systems while maintaining resource efficiency, the embedded system design process needs to be based on a solid basis of computational models.

Prospective authors are invited to submit novel and unpublished work on model-driven embedded system design. The special issue focuses on the following question in particular:
How can computational models be used to drive embedded system design such that performance, quality and resource constraints are met?
Contributions may cover the whole range of computational models (including dataflow models, statebased models, discrete-event models, process algebras, stochastic and probabilistic models), all modern embedded platforms (including multiprocessor systems-on-chip, distributed and networked systems, sensor networks), and all application domains (including multimedia and gaming, automotive, high-tech industrial systems, telecommunication, care and assisted living).

Topics of interest include:
- QoS, resource, and power management
- Operating systems, middleware, distributed control, network management – Synthesis, analysis and verification (especially focusing on non-functional properties) – Software synthesis and model-driven software engineering
- Real-time computing, scheduling, execution time analysis
- Fault tolerance, dependability, security

This special issue is planned as a follow up of the Artist Models of Computation and Communication (MoCC) 2008 workshop to be held in Eindhoven, 3-4 July 2008. Submission to the special issue is open for everyone. Participants of the MoCC workshop are especially invited to submit. Submissions will undergo the usual ACM TECS review process and should be submitted to mc.manuscriptcentral.com/acm/tecs . Authors should clearly indicate on the first page of their submission below the title in bold letters \’Submitted to the Special issue on Model-driven Embedded System Design\’.

Guest editors:

Twan Basten, Eindhoven University of Technology, Netherlands,
a.a.basten@tue.nl
Rolf Ernst, Technische Universitaet Braunschweig, Germany,
ernst@ida.ing.tu-bs.de

Important dates:

15 September 2008: submission deadline
15 December 2008: notification
15 February 2009: final version due
Summer 2009: tentative publication

CALL FOR PAPERS IET Computers & Digital Techniques (Formerly IEE Proceedings Computers & Digital Techniques)
=============================
Special Issue on Networks On Chip
=============================

The most daunting challenge to future on-chip multiprocessor systems is to realise the enormous bandwidth capacities and stringent latency requirements when interconnecting a large number of processing cores in a power-efficient fashion. In a short time span, networks-on-chips have been recognised as the most important alternative for the design of modular and scalable communication architectures in the nanometre regime. This special issue intends to host relevant research contributions advancing knowledge in the field of on-chip networks.
Submissions addressing design issues at all levels of abstraction are encouraged, from physical on-chip link design to data-link layer, from novel design-space exploration, ranging up to programming models and application software.

Topics of interest include but are not limited to:
=====================================

Network architecture (topology, routing, arbitration)
Power and energy issues in NoCs application-specific NoC design Timing, synchronous/asynchronous communication NoC case studies, application-specific NoC design NoC reliability issues
O/S support for NoC
Metrics and benchmarks for NoCs
NoC Network interface issues
Modelling, simulation, and synthesis of NoCs
Network-on-chip design methodologies
NoC Quality of Service
NoC support for CMP / MPSoC
NoC support for memory access
NoCs for FPGAs and structured ASIC
Programming models
Mapping of applications onto NoCs
Novel interconnect links / switches /routers
Signaling and circuit design for NoC links
Physical design of interconnect and NoC
NoC design tools
Debug & Test of NoC
Floorplan aware NoC architecture optimisation

Submission details
===============

Authors are encouraged to submit high-quality research contributions that will not require major revisions. Extensions of paper presented at the International Symposium on Networks-on-Chip, Newcastle Upon Tyne, United Kingdom, April 7=81-10, 2008 (async.org.uk/nocs2008), are especially encouraged, but work not presented at the symposium is also welcome. Please identify clearly the additional material from the original symposium paper in your submitted manuscript. A minimum of 30% new material is required, including deeper theory or extensions of experimental results.

Prospective authors should submit their manuscripts electronically via the IET CDT submission site: mc.manuscriptcentral.com/cdt.
Authors should clearly identify their papers as submissions for the Special Issue on Networks-on-Chip 2008=81 on their manuscript. All manuscripts are subject to the standard IET CDT review process.
Instructions on how to submit a paper can be found at
www.theiet.org/publications/journals/ and authors can contact the journal\’s managing editor, Tony Donegan (tdonegan@theiet.org) , for further assistance.

Guest Editors
===========
Davide Bertozzi
Electrical Engineering Department University of Ferrara, Italy
Email: dbertozzi@ing.unife.it

Kees Goossens
NXP Semiconductors Research, The Netherlands
Computer Engineering Delft University of Technology, The Netherlands Email:kees.goossens@nxp.com
Important Deadlines:
================

Submission deadline: July 1, 2008
Notification of Acceptance: November 1, 2008
Final manuscript submission: January 1, 2009
Target appearance date: March 2009 issue

IET Computers & Digital Techniques is available through the IET Digital Library (ietdl.org/IET-CDT) and IEEE Xplore platforms, and is indexed worldwide in all major databases including ISI, Inspec and EI Compendex.

Call for Papers: ESTIMedia 2008

6th IEEE Workshop on Embedded Systems for Real-Time Multimedia October 23-24, 2008, Atlanta, Georgia

IEEE ESTIMedia \’08 is organized as part of the Embedded Systems Week 2008

www.science.uva.nl/events/ESTIMedia08/

Today, the design process for high-end multimedia systems has become a crucial bottleneck due to the increasing complexity of both the software and the underlying hardware, coupled with shortened time-to-market pressures. While there has been a notable growth in the use and applications of multimedia systems and in the evolution of system-on- chip design technology, there are still enormous opportunities for improving design productivity in this domain. Given this backdrop, the aim of this workshop is to bring together people from different multimedia-related research communities (e.g, software, architectures, real-time systems, DSP, compilers, multimedia applications) who have worked separately, but did not interact sufficiently to address the challenges facing the design of hardware and software for multimedia systems.

After a very successful debut in 2003, consolidated in successive years, we hope that this sixth edition will present a good opportunity for specialists from academia and industry to contribute to this exciting research area. The program will bring together original work from both, academic and industrial research and development. As in the previous editions, papers will be accepted for 30-min oral presentation followed by interactive poster sessions.

All accepted papers will appear in the workshop proceedings to be published by the IEEE.

A special issue of Springer\’s Journal of Signal Processing Systems with the best papers from ESTIMedia \’07 will appear this year and a similar journal special issue is planned for ESTIMedia \’08.

Areas of Interest (but not restricted to)
- Specification and modeling of multimedia systems
- Multimedia systems design methodologies and case studies
- Circuits and architectures for embedded multimedia architectures – Multimedia processors and reconfigurable architectures – Emerging trends (SoCs, NoCs, Game applications, etc.) – Validation and verification
- Software optimization and compiler techniques
- Timing aspects of media streams
- Scheduling of media processing
- Resource and QoS management methods
- Temporal estimation and protection of media streams
- Real-time kernels, OS and middleware support

Paper Submission Guidelines

Both research and application-oriented papers are welcome. Research papers should describe original research, such as new ideas, promising approaches and experiences with practical systems. Application-oriented papers should describe interesting technical aspects of real-life applications, prototypes, experiences, and standards. All papers should be submitted electronically via the workshop webpage. Papers must be in PDF format and should include (1) title, (2) authors and affiliation, (3) e-mail address of the contact author. Submissions must be limited to 6 pages, single-spaced, double-column IEEE format with 10-point fonts.

Papers deviating significantly from these paper size and font
constraints
may be rejected without review. All submitted papers should have original content that has not been previously published in other conferences or journals.

Any questions regarding the submission process may be directed to the TPC Co-Chairs Petru Eles (petel@ida.liu.se) and Andy D. Pimentel (andy@science.uva.nl).

Important Dates
===============
Submission Deadline: June 30, 2008
Author notification: August 22
Camera-ready version: September 1
ESTIMedia Workshop: October 23-24

Organizers
==========

General Chair
————-
Samarjit Chakraborty, National University of Singapore, Singapore
Past General Chair
——————
Soonhoi Ha, Seoul National University, Korea

Technical Program Chairs
————————
Petru Eles, Linkoping University, Sweden
Andy D. Pimentel, University of Amsterdam, the Netherlands

Technical Program Committee Members
———————————–
Twan Basten, Eindhoven Univ. of Technology, The Netherlands
Mladen Berekovic, TU Braunschweig, Germany
Shuvra S. Bhattacharyya, University of Maryland at College Park, USA Naehyuck Chang, Seoul National University, Korea Kristof Denolf, IMEC, Belgium Nikil Dutt, University of California at Irvine, USA
Rolf Ernst, TU Braunschweig, Germany
Heiko Falk, University of Dortmund, Germany
Gerhard Fohler, TU Kaiserslautern, Germany
Marisol Garcia-Valls, University Carlos III, Spain
Catherine Gebotys, University Waterloo, Canada
Soonhoi Ha, Seoul National University, Korea
Joerg Henkel, University of Karlsruhe, Germany
Tomas Henriksson, NXP, The Netherlands
Seongsoo Hong, Seoul National University, Korea
Erwin de Kock, NXP, The Netherlands
Tei-Wei Kuo, National Taiwan University, Taiwan
Ville Lappalainen, Nokia, Finland
Youn-Long Lin, Natl. Tsing Hua University, Taiwan
Radu Marculescu, Carnegie Mellon University, USA
Miguel Miranda, IMEC, Belgium
Kostas Masselos, Imperial College London, UK
Gabriela Nicolescu, Ecole Polytechnique de Montreal, Canada
Maurizio Palesi, University of Catania, Italy
Massoud Pedram, University Southern California, USA
Mihaela van der Schaar, University of California at Los Angeles, USA Nalini Venkatasubramanian, University of California at Irvine, USA Wayne Wolf, Georgia Institute of Technology, USA Sungyoo Yoo, Samsung Electronics, Korea Roger Zimmermann, National University of Singapore, Singapore

—
Dr. Andy D. Pimentel
Computer Systems Architecture group
University of Amsterdam
Kruislaan 403, 1098 SJ, Amsterdam
The Netherlands
Tel. +31 (0)20 5257578
Email (CHANGED!): A.D.Pimentel@uva.nl
www.science.uva.nl/~andy/

HPC Asia 2009 Conference
(The 10th International Conference on High-Performance Computing in Asia-Pacific Region) www.nchc.org.tw/event/2009/hpcasia March 2~5, 2009, Kaohsiung, Taiwan
———————————————————————-
Topics of interest include, but are not limited to?G

*System Architecture and Models for HPC

*System Software for HPC

*Algorithms and Applications for HPC

*Computational Science & Scientific Computation (BT, NT, ST, ET, etc.)

*Grid Computing, its application and Business models

*e-Science and/or Cyber-infrastructure

*High Performance Network and Networked Applications

*Performance Modeling and Evaluation

*Parallel I/O and Storage Systems

*Resource Management and Job Scheduling

*Parallel Programming Model, Environments, and Tools

*PAPER SUBMISSION*

Papers presenting original and unpublished work are invited and will be
evaluated based on originality, significance, technical soundness, and clarity of
exposition. Submitted papers should be formatted in a two-column IEEE Computer
Society format (URL www.computer.org/cspress/instruct.htm) and should not
exceed 8 pages including figures and references. One author of each accepted paper
will be expected to present the paper at the conference. Submission should be via the
conference web site – www.nchc.org.tw/event/2009/hpcasia

*IMPORTANT DATES*

Paper Submission Due?G September 18, 2008

Poster Submission Due?G October 8, 2008

Author Notification?G November 28, 2008
Camera-Ready Paper Due?G December 28, 2008

*POSTER SUBMISSION*

Poster authors are invited to submit poster abstract up to 2 pages. The program
committee will review the abstracts in terms of originality, significance, technical
soundness, and clarity of exposition. All submissions will be handled via e-mail. A
submitted abstract should be PostScript (level 2) or PDF file that will print on a
PostScript printer. Submission should be via the conference web site ?V
www.nchc.org.tw/event/2009/hpcasia

For further information of the conference, please contact master@hpc2009.nchc.org.tw

Chair professor in Computer Engineering – TU Delft

The Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS) invites nominations and applications for the vacancy of Chair Professor in Computer Engineering at the department of Microelectronics and Computer Engineering (ME&CE).
We are seeking for candidates with excellent scientific qualities demonstrated by a PhD degree, publications in international, refereed journals and conferences, and participation in relevant international networks. The research focus of the candidate is one or more of the following topics: Computer architecture and Micro- architecture, Reconfigurable computing, Design tools for HW/SW co-design, Programming paradigms and runtime systems support, Backend compilation, Testing and verification and/or Computer
arithmetic.

The Chair Professor in Computer Engineering is one of the key
positions in the ME&CE department and the DIMES Research Institute.
Very close collaboration with the other sections of the department and the departments of Telecommunication and Software Technology is expected. It is important that the new professor has an initiating and stimulating role in defining highly relevant research themes in the future together with an appropriate research agenda and corresponding composition of the section. Collaboration with industry and transferring knowledge in the form of startups and spin-offs are considered very important. As the CE section plays an important role in two Master of Science programs (Computer Engineering and Embedded Systems), it is expected that the chair is actively involved in both. In addition, the chair will contribute to the faculty wide education at undergraduate and graduate levels.
One very important task is to continuously monitor and revise the content of the education programs to correspond to the latest international and national industrial trends and requirements.
The chair is responsible for managing the entire Computer
Engineering section and for embedding the CE activities in the
wider context of the Department, the Faculty and the University.
Successful candidates must have demonstrated leadership abilities and excellent management and communication skills. The chair professor actively supports the EEMCS faculty\’s ambition to be an international top-level institution, both in research and education.

SALARY
——-
Very competitive.

CONTACT and DEADLINE
——————–
Applicants are requested to submit a resume, a statement of research, teaching interests, achievements, and a list of at least four references before August 1, 2008 by e-mail to the dean of the faculty Prof.dr. Daan Lenstra: D.Lenstra@tudelft.nl.

ADDITIONAL INFORMATION
———————-
www.ewi.tudelft.nl/vacatures (EWI 2008.24)

attached adverts from:
- IEEE Computer June 2008 issue
- NRC Handelblad
(both to appear)

–
Georgi N. Gaydadjiev E-mail: georgi@ce.et.tudelft.nl
TU Delft (Delft University of Technology) Phone: +31 15 2786168
Faculty of Electrical Engineering, Fax: +31 15 2784898
Mathematics and Computer Science

Department of Microelectronics and Computer Engineering

Mekelweg 4, 2628 CD Delft, the Netherlands

ce.et.tudelft.nl/~georgi/ IE= EE E-mail: G.Gaydadjiev@ieee.org

Post Doctoral Researcher in Supercomputing and its Applications

The Information Technologies Group (GTI, www-gti.det.uvigo.es), University of Vigo, Spain, (www.uvigo.es) offers a three-year post doctoral contract in the area of Supercomputing and its Applications.

Possible research topics are cluster communications optimization and health/engineering applications.
Research will take advantage from the long-term collaboration between the GTI Group and the Galician Supercomputing Center (CESGA, www.cesga.es) , which hosts the Finis Terrae Supercomputer (www.hpcwire.com/offthewire/HP_Announces_Integrity-Based_Supercomput= er_Finis_Terrae.html).

Candidates must demonstrate a two-year post-doctoral experience outside the parent institution.

SALARY
——-
The salary is 36.000 EUR per year before taxes and includes health insurance, plus allowances for presentations at international conferences.

CONTACT and DEADLINE
——————–
Closing date for initial contact: July 1st, 2008

Quote Ref: SPC-Pondal/2008 (in all enquiries)

Enquiries may be sent to:
Dr. Francisco J. Gonzalez-Castano mailto:javier@det.uvigo.es

Base-Par (www.acso.uneb.br/basepar2009) is an international conference dedicated to the promotion and advancement of all aspects of parallel and distributed computing. Base-Par focuses on all aspects of hardware, software, algorithms and applications for parallel and distributed computing. The objective of Base-Par is to provide a forum within which to promote the development of parallel and distributed computing both as an industrial technique and an academic discipline, extending the frontier of both the state of the art and the state of the practice.

Authors are invited to submit original papers in Portuguese, Spanish or English. The topics of interest (in no particular order) include, but are not limited to: 1. High Performance Computing Applications 2. Performance Evaluation 3. Parallel
Distributed Data Bases and Data mining 4. High Performance Computing with Bioinformatics 5. Dependability 6. Grid and Cluster Computing 7. Parallel Programming Models ? Methods and Languages 8. High Performance Multimedia 9.
Scheduling and Load Balancing 10. Distributed Systems Algorithms Full details on the topics, including topic description and chairs, are available on the BasePar 2009 website. The conference will feature tutorials and invited talks.

*Important Dates:*

Full Paper Submission: December 15, 2008
Full Author Notification: February 15, 2009
Camera-ready full papers: February 28, 2009
Copyright form for accepted papers: February 28, 2009
Author Registration: March 10, 2009
Conference date: 01-04 Abril 2009

*********************************************************************** Possible Research Job in the UK ***********************************************************************

Please find attached a Call for Applications for two-year research positions in the UK, followed by continued support for research for another ten years. The positions are funded by the UK\’s leading research academies and are very prestigious.

Potential applicants need a UK sponsor. The University of York is interested in supporting one applicant to work on techniques of program verification.
We have a strong tradition of cooperation with industry, and are interested in projects concerned with integrating, improving, extending, or adapting techniques with a view to enhance their scope and applicability in the large.

Interested candidates should contact Ana Cavalcanti (
www-users.cs.york.ac.uk/~alcc/) by the 4th July, and provide a CV. Applicants with a good chance of success will be contacted for discussion of a research plan. We will provide guidance in the preparation of the application.

The University of York is a world top-100 university in one of Europe\’s most beautiful cities. It has one of the world\’s leading Computer Science departments, with staff and students from around the globe, and recognised for the high quality of its research, teaching and technology transfer. ( www.cs.york.ac.uk).

***************************************************************************

International Fellowships

Dear All,

A new multi-million pound initiative to fund research collaborations and improve links between UK and overseas researchers has been launched.

The Newton International Fellowships aim to attract the most promising, early stage, post-doctoral researchers working overseas, who do not hold UK citizenship, in the fields of humanities, engineering, natural and social sciences.

The scheme provides funding to successful candidates for up to 2 years to work with research groups at a UK research Institution and to establish long term international collaborations.

The Fellowships, and the linked alumni association, are an initiative of the UK\’s leading research academies – the British Academy, The Royal Academy of Engineering and the Royal Society – and Research Councils UK (RCUK).

The funding will be distributed in the form of 50 research fellowships per round of applications. Successful candidates will receive an annual subsistence of ?24,000, up to ?8,000 for research expenses, and a one-off payment of ?2,000 for relocation.

It is hoped that the collaborations and links formed during the course of the fellowship will continue to benefit Newton Fellows throughout their careers. To facilitate this, former Fellows will be eligible for follow-on funding of up to ?6,000 per year, for up to ten years, to help develop lasting international networks with the UK.

Former Newton Fellows will also become members of the UK International Fellowship Association managed by RCUK, which aims to build a network of overseas researchers, help them maintain contact with the UK and provide networking opportunities to encourage new collaborations.

Applications for Newton International Fellowships are invited for Fellowships starting in 2009. The deadline for applications is *Monday 4 August 2008*.

For more information on the Newton International Fellowship Scheme please go to www.newtonfellowships.org or email any enquiries to info@newtonfellowships.org.